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How to suppress current spikes in transistor feedback loop

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I am trying to pulse a load with a small constant current pulse (2mA @ 500us). The load does unfortunately have an unknown capacitance in the range 10nF - 1uF, parallel with an unknown resistance varying from 0.5-5kOhm. The current pulse should be constant over a resistor in series with the load, and not deviate more than 2%.

The circuit is powered by a single 3V cell, and will have the L8410 to generate sufficient voltage for the current pulses. An AVR Attiny will control the pulse duration and timing.

I have tested a number of different designs to see if they meet my requirements (current mirror, transistor feedback loops, opamp loops, IC's as LT3092), but they all suffer from large current spikes when pulsing the load.

The circuit design I have found to be best so far is a feedback loop between a MOSFET (M1) and BJT (Q2) transistor, where a second BJT (Q1) is used as a voltage controlled resistor from a LP-filtered PWM input (V5) to adjust the setpoint for Q2. See the LTspice schematics below.

MOSFET - BJT feedback loop

The idea is to use the fast dynamics of the M1-Q2 analog regulation to handle the edges from the switch, while the MCU-Q1 in a loop with an current sensing opamp (not in schematics) will adjust the output to have an average at 2mA in the end. The switch is implemented using Vishay DG4053A (~100ohm ON resistance, ~100ns switch time).

The problem is that I get very large current spikes as in the simulation below (current trough Rtest in lowest pane).

MOSFET - BJT feedback loop. Simulation

My question is how to suppress/eliminate the spikes in this design. I would also be very grateful for any suggestions for a better design than the one I have proposed if that would help on the problem. The circuit must run on a 3V cell coin, which is the only limitation except the pulse spec and load characteristics.


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